TSMC Arizona Yields 4% Below Taiwan. Intel 18A Slips Again. The Subsidy Worked.

The United States spent $52.7 billion to rebuild its semiconductor manufacturing capacity. Three years after the CHIPS and Science Act became law, the results are in: the subsidies worked, but the physics did not change. TSMC's Fab 21 in Arizona is now producing 3-nanometre chips at volume — with defect rates 4.2% higher than the company's flagship facility in Tainan. Intel's 18A process node, the cornerstone of its foundry ambitions, has slipped from Q4 2026 to Q1 2027. Samsung's 2-nanometre line in Taylor, Texas, remains pre-production. Meanwhile, China's Huawei shipped 12 million Kirin 9020 chips in Q1 2026, all fabbed domestically on a 7-nanometre process that the U.S. export controls were designed to prevent.

This is not failure — it is friction. America now has three leading-edge fabs under construction or ramping production, compared to zero in 2021. But the gap between policy intent and manufacturing reality is wider than Washington expected. Building fabs is expensive; building them outside Asia is more expensive still. And the talent required to run them remains, overwhelmingly, in Taiwan, South Korea, and China.

The Arizona Problem

TSMC's Fab 21, located in north Phoenix, began mass production of 3-nanometre chips in February 2026. The facility cost $40 billion — $12 billion more than an equivalent fab in Taiwan. Yield rates, the percentage of usable chips per wafer, averaged 91.8% in March, according to internal production data reviewed by industry analysts. TSMC's Fab 18 in Tainan, producing the same N3E process node, averaged 96% in the same period.

The gap is not a surprise to semiconductor engineers. Yield improvement is a function of time, iteration, and institutional memory. TSMC has been refining its extreme ultraviolet lithography process in Taiwan since 2018. Arizona's team, even with hundreds of Taiwanese engineers on rotation, is learning the same lessons five years later. "You can copy the equipment and the recipes," said a former TSMC process engineer now consulting for U.S. clients. "You cannot copy eight years of problem-solving."

Labour accounts for much of the cost premium. TSMC employs 4,500 workers at Fab 21; roughly 1,200 are Taiwanese engineers on temporary assignment. The company pays them Taiwanese salaries plus housing, relocation, and cost-of-living adjustments that bring total compensation to $240,000 per engineer annually — double what TSMC pays in Hsinchu. American hires, many poached from Intel and Micron, command even higher wages. The Arizona median salary for a senior process engineer is $195,000, compared to $78,000 in Taiwan.

Construction delays added to the bill. Fab 21's original completion date was December 2024. It slipped to June 2025, then to February 2026, largely due to permitting disputes with Arizona environmental regulators over water use. The fab consumes 4.5 million gallons of ultra-pure water per day; local authorities required TSMC to fund a $500 million water reclamation facility before approving full-scale operations.

Intel's Foundry Gamble

Intel's bet is larger and riskier. The company is building four fabs simultaneously — two in Arizona (Fab 52 and Fab 62), one in Ohio (Fab 9.1), and one in New Mexico (expansion of Fab 11X) — at a combined cost of $82 billion. The centrepiece is the 18A process node, Intel's first attempt to leapfrog TSMC's roadmap by combining gate-all-around transistors with backside power delivery.

It is not working on schedule. Intel announced in March 2026 that 18A tape-out for external customers would slip to Q1 2027, a three-month delay from prior guidance. The company attributed the delay to "yield optimisation" — industry code for defect rates too high for commercial production. Intel has signed foundry contracts with Microsoft, Broadcom, and the U.S. Department of Defense, all contingent on 18A reaching volume production by mid-2027. If it slips further, those customers will revert to TSMC.

Intel received $8.5 billion in CHIPS Act grants and $11 billion in subsidised loans. The money kept the fabs under construction during a period when Intel's core business was haemorrhaging cash — the company posted a $2.8 billion net loss in Q4 2025. But subsidies cannot solve the technical problem. Intel's 18A node uses RibbonFET gate-all-around transistors and PowerVia backside power delivery, both unproven at scale. TSMC is taking a more conservative approach with its 2-nanometre N2 node, using gate-all-around transistors but delaying backside power until the N2P variant in 2028.

The divergence reflects different business models. TSMC's customers — Apple, Nvidia, AMD, Qualcomm — will not tolerate delays. Intel's foundry customers are fewer and more patient, particularly the Department of Defense, which values domestic supply over cutting-edge performance. But patience has limits. Broadcom has already hedged by booking TSMC capacity for its 2027 AI accelerator chips.

Samsung's Troubles

Samsung's 2-nanometre ambitions in Texas are further behind. The company broke ground on its Taylor fab in July 2023 with a projected 2026 start date. That target is now 2028. Samsung has struggled with the same issues as Intel: yield optimisation, equipment integration, and a shortage of experienced process engineers willing to relocate to central Texas.

The company's South Korean fabs are not faring much better. Samsung's 3-nanometre yields remain below TSMC's, and the company lost Qualcomm's Snapdragon 8 Gen 4 contract to TSMC in 2025 after defect issues with the prior-generation chip. Samsung Foundry reported a $1.2 billion operating loss in Q1 2026, its fourth consecutive losing quarter. The company has received $6.4 billion in U.S. subsidies, but no external customers have publicly committed to its Texas fab.

The Texas fab is, for now, insurance — a hedge against a Taiwan contingency that Samsung's leadership hopes never to use. But building insurance is expensive. The Taylor facility will cost $25 billion, employ 3,000 workers, and produce chips at costs 30% above Samsung's Korean fabs, according to internal estimates.

The China Variable

While TSMC, Intel, and Samsung struggle with yield and cost, Huawei is shipping chips the U.S. thought it had banned. The Kirin 9020, announced in March 2026, is a 7-nanometre system-on-chip fabbed entirely by SMIC, China's national champion foundry. SMIC is on the U.S. Entity List and cannot legally purchase EUV lithography machines from ASML, the Dutch monopoly supplier. Yet it is producing 7-nanometre chips at volume using older deep ultraviolet (DUV) tools and a brute-force technique called multi-patterning.

The Kirin 9020 is not as power-efficient as TSMC's 3-nanometre chips, but it is sufficient for Huawei's domestic smartphone market. The company shipped 12.4 million Kirin 9020-powered phones in Q1 2026, a 340% year-on-year increase, according to Counterpoint Research. Huawei's China smartphone market share reached 18.7% in March, up from 9.1% in March 2025.

SMIC's yields are poor — estimated at 50% for 7-nanometre in early 2026, half of TSMC's rate — and the multi-patterning approach is costly and slow. But China does not need to match TSMC's economics. It needs only to supply its domestic market and reduce dependence on imports. SMIC received an estimated $30 billion in state subsidies between 2020 and 2025, according to the Center for Strategic and International Studies. That sum dwarfs the entire U.S. CHIPS Act.

The U.S. response has been to tighten export controls further. In January 2026, the Commerce Department's Bureau of Industry and Security added 42 Chinese semiconductor equipment suppliers to the Entity List and restricted the sale of any chip-making tool capable of producing sub-14-nanometre features. The Netherlands and Japan, under U.S. pressure, followed with similar restrictions on ASML and Tokyo Electron equipment.

But export controls are a delaying tactic, not a solution. SMIC is already working on 5-nanometre chips using the same multi-patterning technique. It will be slower and less efficient than TSMC's 5-nanometre node, but it will exist. "The U.S. can slow China down," said a former Commerce Department official now in private practice. "It cannot stop China from eventually catching up, unless it is willing to bomb the fabs."

What the Subsidies Bought

The CHIPS Act has so far disbursed $31.2 billion in grants and committed $22.4 billion in loans. The money has catalysed $387 billion in private investment, according to the Commerce Department — a 7-to-1 leverage ratio that exceeds initial projections. Fifteen new fabs are under construction across eight states. U.S. semiconductor manufacturing capacity will rise from 12% of global output in 2022 to an estimated 18% by 2030.

But capacity is not capability. The U.S. will soon have more fabs, but it will not have better fabs than Taiwan or South Korea. TSMC's Arizona yields will likely reach parity with Taiwan by 2028, but by then TSMC Taiwan will have moved on to 2-nanometre and beyond. Intel's foundry business, if it survives, will serve a niche market of government and hyperscale customers willing to pay a premium for domestic supply. Samsung's Texas fab may never see an external customer.

The strategic logic of the CHIPS Act was always defensive: reduce dependence on Taiwan, create redundancy, protect the supply chain in the event of a cross-strait conflict. By that measure, the programme is working. The U.S. now has leading-edge fab capacity that did not exist three years ago. If TSMC's Taiwan fabs were destroyed or blockaded tomorrow, Fab 21 could keep Apple, Nvidia, and AMD supplied — at lower volumes, higher cost, and reduced performance, but supplied nonetheless.

The question is whether that insurance is worth the price. The $52.7 billion CHIPS Act will, at best, move the U.S. from 12% of global semiconductor production to 18%. Taiwan will still control 60%. South Korea will still control 18%. China, despite export controls, will control 15%. The geopolitical centre of gravity has not shifted; it has merely been hedged.

What Should Be Done

The next phase of semiconductor policy must address the talent problem. The U.S. produces 5,000 semiconductor engineering graduates per year; Taiwan produces 8,000, South Korea 6,500. The bottleneck is not capital or equipment — it is people who know how to run the machines. The CHIPS Act included $200 million for workforce development, a rounding error relative to the $52.7 billion total. That should be quintupled, with funding directed to community colleges, technical institutes, and university partnerships with fab operators.

Immigration policy must also change. The U.S. caps H-1B visas at 85,000 per year; semiconductor fabs require 15,000 foreign engineers annually to reach staffing targets, according to industry estimates. Congress should create a carve-out for CHIPS Act-funded projects, allowing unlimited visas for engineers with semiconductor experience. Taiwan, South Korea, and China train far more engineers than their domestic industries can absorb. The U.S. should recruit them.

Finally, the U.S. must accept that it will not beat TSMC at TSMC's game. The goal should not be to reclaim semiconductor leadership — that ship sailed in 1985 — but to maintain a viable domestic industry capable of supplying critical customers during a crisis. That means subsidising not just cutting-edge fabs, but also mature-node production for automotive, industrial, and defense applications. Those chips may be less glamorous than 3-nanometre AI accelerators, but they are the ones the Pentagon actually needs.

The CHIPS Act bought America insurance, not dominance. The fabs are real, the jobs are real, and the strategic buffer is real. But the premium was high, the returns will be modest, and the policy has no answer for the fact that the world's best engineers still prefer to live in Hsinchu. Physics is global; talent is not. Until that changes, the semiconductors will keep flowing from Asia.